Module: wine Branch: master Commit: d11e72f9258df06c2fc45d72746f30d5611e8639 URL: http://source.winehq.org/git/wine.git/?a=commit;h=d11e72f9258df06c2fc45d7274...
Author: André Hentschel nerv@dawncrow.de Date: Wed Jan 16 00:49:36 2013 +0100
server: Add ARM64 support.
---
dlls/ntdll/server.c | 2 + include/wine/server_protocol.h | 6 +++- server/protocol.def | 4 ++- server/thread.c | 6 +++++ server/trace.c | 42 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 57 insertions(+), 3 deletions(-)
diff --git a/dlls/ntdll/server.c b/dlls/ntdll/server.c index 2fe7877..af2ce06 100644 --- a/dlls/ntdll/server.c +++ b/dlls/ntdll/server.c @@ -102,6 +102,8 @@ static const enum cpu_type client_cpu = CPU_POWERPC; static const enum cpu_type client_cpu = CPU_SPARC; #elif defined(__arm__) static const enum cpu_type client_cpu = CPU_ARM; +#elif defined(__aarch64__) +static const enum cpu_type client_cpu = CPU_ARM64; #else #error Unsupported CPU #endif diff --git a/include/wine/server_protocol.h b/include/wine/server_protocol.h index 2a181fc..99bcfae 100644 --- a/include/wine/server_protocol.h +++ b/include/wine/server_protocol.h @@ -129,7 +129,7 @@ typedef union
enum cpu_type { - CPU_x86, CPU_x86_64, CPU_POWERPC, CPU_ARM, CPU_SPARC + CPU_x86, CPU_x86_64, CPU_POWERPC, CPU_ARM, CPU_ARM64, CPU_SPARC }; typedef int cpu_type_t;
@@ -145,6 +145,7 @@ typedef struct unsigned int cs, ss, flags, __pad; } x86_64_regs; struct { unsigned int iar, msr, ctr, lr, dar, dsisr, trap, __pad; } powerpc_regs; struct { unsigned int sp, lr, pc, cpsr; } arm_regs; + struct { unsigned __int64 sp, pc, pstate; } arm64_regs; struct { unsigned int psr, pc, npc, y, wim, tbr; } sparc_regs; } ctl; union @@ -154,6 +155,7 @@ typedef struct r8, r9, r10, r11, r12, r13, r14, r15; } x86_64_regs; struct { unsigned int gpr[32], cr, xer; } powerpc_regs; struct { unsigned int r[13]; } arm_regs; + struct { unsigned __int64 x[31]; } arm64_regs; struct { unsigned int g[8], o[8], l[8], i[8]; } sparc_regs; } integer; union @@ -5713,6 +5715,6 @@ union generic_reply struct set_suspend_context_reply set_suspend_context_reply; };
-#define SERVER_PROTOCOL_VERSION 437 +#define SERVER_PROTOCOL_VERSION 438
#endif /* __WINE_WINE_SERVER_PROTOCOL_H */ diff --git a/server/protocol.def b/server/protocol.def index 886853f..4038e48 100644 --- a/server/protocol.def +++ b/server/protocol.def @@ -145,7 +145,7 @@ typedef union /* supported CPU types */ enum cpu_type { - CPU_x86, CPU_x86_64, CPU_POWERPC, CPU_ARM, CPU_SPARC + CPU_x86, CPU_x86_64, CPU_POWERPC, CPU_ARM, CPU_ARM64, CPU_SPARC }; typedef int cpu_type_t;
@@ -161,6 +161,7 @@ typedef struct unsigned int cs, ss, flags, __pad; } x86_64_regs; struct { unsigned int iar, msr, ctr, lr, dar, dsisr, trap, __pad; } powerpc_regs; struct { unsigned int sp, lr, pc, cpsr; } arm_regs; + struct { unsigned __int64 sp, pc, pstate; } arm64_regs; struct { unsigned int psr, pc, npc, y, wim, tbr; } sparc_regs; } ctl; /* selected by SERVER_CTX_CONTROL */ union @@ -170,6 +171,7 @@ typedef struct r8, r9, r10, r11, r12, r13, r14, r15; } x86_64_regs; struct { unsigned int gpr[32], cr, xer; } powerpc_regs; struct { unsigned int r[13]; } arm_regs; + struct { unsigned __int64 x[31]; } arm64_regs; struct { unsigned int g[8], o[8], l[8], i[8]; } sparc_regs; } integer; /* selected by SERVER_CTX_INTEGER */ union diff --git a/server/thread.c b/server/thread.c index f9a575e..fdbc144 100644 --- a/server/thread.c +++ b/server/thread.c @@ -63,6 +63,8 @@ static const unsigned int supported_cpus = CPU_FLAG(CPU_POWERPC); static const unsigned int supported_cpus = CPU_FLAG(CPU_SPARC); #elif defined(__arm__) static const unsigned int supported_cpus = CPU_FLAG(CPU_ARM); +#elif defined(__aarch64__) +static const unsigned int supported_cpus = CPU_FLAG(CPU_ARM64); #else #error Unsupported CPU #endif @@ -1023,6 +1025,7 @@ static unsigned int get_context_system_regs( enum cpu_type cpu ) case CPU_x86_64: return SERVER_CTX_DEBUG_REGISTERS; case CPU_POWERPC: return 0; case CPU_ARM: return 0; + case CPU_ARM64: return 0; case CPU_SPARC: return 0; } return 0; @@ -1056,6 +1059,9 @@ void break_thread( struct thread *thread ) case CPU_ARM: data.exception.address = thread->context->ctl.arm_regs.pc; break; + case CPU_ARM64: + data.exception.address = thread->context->ctl.arm64_regs.pc; + break; } generate_debug_event( thread, EXCEPTION_DEBUG_EVENT, &data ); thread->debug_break = 0; diff --git a/server/trace.c b/server/trace.c index dc5074f..41c5424 100644 --- a/server/trace.c +++ b/server/trace.c @@ -557,6 +557,48 @@ static void dump_varargs_context( const char *prefix, data_size_t size ) if (ctx.flags & SERVER_CTX_INTEGER) for (i = 0; i < 13; i++) fprintf( stderr, ",r%u=%08x", i, ctx.integer.arm_regs.r[i] ); break; + case CPU_ARM64: + if (ctx.flags & SERVER_CTX_CONTROL) + { + dump_uint64( ",sp=", &ctx.ctl.arm64_regs.sp ); + dump_uint64( ",pc=", &ctx.ctl.arm64_regs.pc ); + dump_uint64( ",pstate=", &ctx.ctl.arm64_regs.pstate ); + } + if (ctx.flags & SERVER_CTX_INTEGER) + { + dump_uint64( ",x0=", &ctx.integer.arm64_regs.x[0] ); + dump_uint64( ",x1=", &ctx.integer.arm64_regs.x[1] ); + dump_uint64( ",x2=", &ctx.integer.arm64_regs.x[2] ); + dump_uint64( ",x3=", &ctx.integer.arm64_regs.x[3] ); + dump_uint64( ",x4=", &ctx.integer.arm64_regs.x[4] ); + dump_uint64( ",x5=", &ctx.integer.arm64_regs.x[5] ); + dump_uint64( ",x6=", &ctx.integer.arm64_regs.x[6] ); + dump_uint64( ",x7=", &ctx.integer.arm64_regs.x[7] ); + dump_uint64( ",x8=", &ctx.integer.arm64_regs.x[8] ); + dump_uint64( ",x9=", &ctx.integer.arm64_regs.x[9] ); + dump_uint64( ",x10=", &ctx.integer.arm64_regs.x[10] ); + dump_uint64( ",x11=", &ctx.integer.arm64_regs.x[11] ); + dump_uint64( ",x12=", &ctx.integer.arm64_regs.x[12] ); + dump_uint64( ",x13=", &ctx.integer.arm64_regs.x[13] ); + dump_uint64( ",x14=", &ctx.integer.arm64_regs.x[14] ); + dump_uint64( ",x15=", &ctx.integer.arm64_regs.x[15] ); + dump_uint64( ",x16=", &ctx.integer.arm64_regs.x[16] ); + dump_uint64( ",x17=", &ctx.integer.arm64_regs.x[17] ); + dump_uint64( ",x18=", &ctx.integer.arm64_regs.x[18] ); + dump_uint64( ",x19=", &ctx.integer.arm64_regs.x[19] ); + dump_uint64( ",x20=", &ctx.integer.arm64_regs.x[20] ); + dump_uint64( ",x21=", &ctx.integer.arm64_regs.x[21] ); + dump_uint64( ",x22=", &ctx.integer.arm64_regs.x[22] ); + dump_uint64( ",x23=", &ctx.integer.arm64_regs.x[23] ); + dump_uint64( ",x24=", &ctx.integer.arm64_regs.x[24] ); + dump_uint64( ",x25=", &ctx.integer.arm64_regs.x[25] ); + dump_uint64( ",x26=", &ctx.integer.arm64_regs.x[26] ); + dump_uint64( ",x27=", &ctx.integer.arm64_regs.x[27] ); + dump_uint64( ",x28=", &ctx.integer.arm64_regs.x[28] ); + dump_uint64( ",x29=", &ctx.integer.arm64_regs.x[29] ); + dump_uint64( ",x30=", &ctx.integer.arm64_regs.x[30] ); + } + break; case CPU_SPARC: if (ctx.flags & SERVER_CTX_CONTROL) fprintf( stderr, ",psr=%08x,pc=%08x,npc=%08x,y=%08x,wim=%08x,tbr=%08x",